This disclosure relates to data processing and data storage, and more specifically, to garbage collection in a non-volatile memory system. Still more particularly, the disclosure relates to techniques for accelerating garbage collection of flushed logical erase blocks in a non-volatile memory system.
NAND flash memory is an electrically programmable and erasable non-volatile memory technology that stores one or more bits of data per memory cell as a charge on the floating gate of a transistor or a similar charge trap structure. The amount of charge on the floating gate modulates the threshold voltage of the transistor. By applying a proper read voltage and measuring the amount of current, the programmed threshold voltage of the memory cell can be determined and thus the stored information can be detected. Memories storing one, two, three and four bits per cell are respectively referred to in the art as Single Level Cell (SLC), Multi-Level Cell (MLC), Three Level Cell (TLC), and Quad Level Cell (QLC) memories.
In a typical implementation, a NAND flash memory array is organized in physical blocks (also referred to as “erase blocks”) of physical memory, each of which includes multiple physical pages each in turn containing a multiplicity of memory cells. By virtue of the arrangement of the word and bit lines utilized to access memory cells, flash memory arrays have generally been programmed on a physical page basis, but erased on a physical block basis. Blocks must be erased prior to being programmed.
Over time, various ones of the logical pages of data programmed into a physical block of a NAND flash memory array will be invalidated, for example, by write operations to the logical addresses of the logical pages. The invalidation of these logical pages leads to data fragmentation and the inability to use the storage capacity associated with the invalidated logical pages until the physical block is again erased and reprogrammed. This reduction in available storage capacity, if not managed appropriately, can in turn reduce overprovisioning and undesirably increase write amplification. In order to recover the use of the storage capacity associated with invalidated logical pages, a conventional flash controller regularly performs “garbage collection,” which includes the controller collecting the still valid logical pages from one or more fragmented blocks, programming an available erased block with the valid logical pages, and then erasing the fragmented block(s) in preparation for re-use.